Apparatus and process for precise encapsulation of flip chip interconnects

ABSTRACT

A method for encapsulating flip chip interconnects includes applying a limited quantity of encapsulating resin to the interconnect side of an integrated circuit chip, and thereafter bringing the chip together with a substrate under conditions that promote the bonding of bumps on the interconnect side of the chip with bonding pads on the substrate. In some embodiments, the step of applying resin to the chip includes dipping the interconnect side of the chip to a predetermined depth in a pool of resin, and then withdrawing the chip from the resin pool. In some embodiments the step of applying resin to the chip includes providing a reservoir having a bottom, providing a pool of resin in the reservoir to a shallow depth over the reservoir bottom, dipping the chip into the resin pool so that the bumps contact the reservoir bottom, and then withdrawing the chip from the resin pool. Also, apparatus for applying a precise volume of encapsulating resin to a chip, includes a reservoir having a bottom, and means for dispensing a pool of encapsulating resin to a predetermined depth over the reservoir bottom.

CROSS REFERENCE TO RELATED APPLICATIONS

This application is a divisional of application Ser. No. 10/081,425filed 22 Feb. 2002, which claims priority from Provisional ApplicationNo. 60/272,280, filed Feb. 27, 2001.

BACKGROUND

This invention relates to semiconductor device packaging and,particularly, to flip chip packages.

Flip chip packages include an integrated circuit chip connected to apackage substrate by way of interconnect bumps which are mounted on theintegrated circuit chip in arrangement corresponding to the arrangementto metal contact pads on substrate. During package assembly the chip andsubstrate are opposed with the corresponding bumps and pads aligned, andthen the chip and substrate are brought together under conditions thatpromote the bonding of the bumps on the metal pads.

Flip chip devices are conventionally encapsulated to improve thereliability of the interconnections between the chip and the substrate.Ordinarily the encapsulation is carried out using one of two approaches.

In the first approach, commonly known as “under filling”, encapsulationis carried out following formation of the interconnections between thechip and substrate, by dispensing the encapsulating resin into the gapbetween the chip in the substrate near an outer edge of the chip, andthen allowing the resin to move into the gap between the chip and thesubstrate by capillary action. This approach carries a high processingcost, because the under filling process is time-consuming and highthroughput cannot be achieved. Moreover, a significant space must beprovided between adjacent devices to accommodate the dispensed resinbead at the edge of each chip this requirement for extra space betweenadjacent devices limits of substrate utilization in high-densityapplications.

In a second approach, a quantity of encapsulating resin is applied tothe surface of substrate prior to assembly of the package. Then, as thechip and substrate are brought together in the assembly process, anyencapsulating resin that overlies the pads is displaced by pressure ofthe bumps against the pads during the attachment process. This techniqueis susceptible to bleed-out of the resin laterally away from the chipedge as well as vertically along the sidewalls of the chip. Bleed-outaway from the chip edge requires extra space between adjacent devices,limiting substrate utilization; and vertical bleed-out can result inresin reaching the backside of the chip and, in some instances,contamination of the bonding tool which is used to manipulate the die.Bleed-out is disruptive of the manufacturing process and is thereforeundesirable. Moreover, a thermal excursion required to attach a devicecan cause partial curing of the applied resin on adjacent sites, therebyadversely affecting the quality of the inner connections on adjacentdevices. Moreover, there is a practical lower limit on the thinness towhich resin material can be applied by dispensing onto a surface or byscreen printing, and that limit is generally greater (in some instancestwo or three times greater: about 100 microns for dispensing; about 50microns for screen printing) than the bump standoff height (typically,for example, about 50-75 microns before bonding; and as little as about25-30 microns, for example, after bonding) that is preferred in somesmall scale flip chip packages.

Both of these approaches entail a dedicated unit process for applicationof the resin material, usually requiring dedicated equipment for theunit process and adding to both the labor costs and capital depreciationcost of the overall process.

SUMMARY

The invention provides an improved method for encapsulating flip chipinterconnects. According to the method, a limited quantity ofencapsulating resin is applied to the interconnect side of the chip, andthereafter the chip and substrate are opposed with the correspondingbumps and pads aligned, and then the chip and substrate are broughttogether under conditions that promote the bonding of the bumps on themetal pads. The resin may be applied to the interconnect side of thechip in any of a variety of ways. I have found, however, that a definedquantity of resin can conveniently and reliably be applied selectivelyto the chip by dipping the interconnect side of the chip in a pool ofthe resin to a predetermined depth, and then withdrawing the chip fromthe resin pool. A quantity of resin, precisely defined by thepredetermined depth to which the chip was dipped in the resin pool,remains on the dipped portion of the chip as the chip is withdrawn fromthe resin pool and brought to the substrate for assembly. Mostconveniently and reliably, the pool of resin is provided to a shallowdepth in a reservoir, and the chip is dipped into the pool of resin inthe reservoir so that the bumps contact the bottom of the reservoir. Thepredetermined shallow depth of the resin pool thereby determines thequantity of resin that remains on the dipped portion of the chip as thechip is withdrawn from the pool.

Accordingly, in one general aspect the invention features a method forencapsulating flip chip interconnects, by applying a limited quantity ofencapsulating resin to the interconnect side of an integrated circuitchip, and thereafter bringing the chip together with a substrate underconditions that promote the bonding of bumps on the interconnect side ofthe chip with bonding pads on the substrate.

In some embodiments, the step of applying resin to the chip includesdipping the interconnect side of the chip to a predetermined depth in apool of resin, and then withdrawing the chip from the resin pool. Insome embodiments the predetermined depth to which the chip is dipped inthe pool approximates the standoff height between the bump surfaces andthe chip surface, so that the surface of the resin pool contacts thechip surface, with result that when the chip is withdrawn from the resinpool some quantity of resin may remain on the chip surface as well as onfeatures that standoff from the chip surface. Or, the predetermineddepth to which the chip is dipped in the pool is somewhat less than thestandoff height, so that the chip surface does not contact the resinpool, with the result that when the chip is withdrawn from the resinpool some quantity of resin remains only on features that standoff fromthe chip surface, such as the bumps or a portion of the bumps.

In some embodiments the step of applying resin to the chip includesproviding a reservoir having a bottom, providing a pool of resin in thereservoir to a shallow depth over the reservoir bottom, dipping the chipinto the resin pool so that the bumps contact the reservoir bottom, andthen withdrawing the chip from the resin pool. In some such embodiments,the shallow depth of the pool over the reservoir bottom approximates thestandoff height between the bumps surfaces and the chip surface, or issomewhat less than the standoff height.

In another general aspect the invention features apparatus for applyinga precise volume of encapsulating resin to a chip, including a reservoirhaving a bottom, and means for dispensing a pool of encapsulating resinto a predetermined depth over the reservoir bottom. In some embodimentsthe reservoir is at least deep enough to accommodate a pool having apredetermined depth that approximates a bump standoff height on thechip. In some embodiments the means for dispensing the resin poolincludes means for dispensing a measured volume of resin into thereservoir. In some embodiments the means for dispensing the resin poolincludes means for dispensing an excess of resin into the reservoir, andmeans such as a doctor for removing the excess; in such embodiments thepredetermined depth of the pool is established by the depth of thereservoir itself.

An advantage of the method of the invention is that the resin pattern isself-aligned to the chip, so that there is no requirement according tothe invention for alignment of the dispense pattern with the flip chipfootprint pattern on the substrate. Moreover the resin is appliedaccording to the invention preferentially to the portions of theinterconnect side of the chip on which application of resin is mostparticularly desired, that is, on hand in the vicinity of the bumps.

The resin reservoir is readily integrated with existing chip attachmentequipment, so that there is no need for specialized or dedicatedequipment or process steps for applying resin according to theinvention.

BRIEF DESCRIPTION OF THE DRAWINGS

FIGS. 1-5 are a diagrammatic sketches in a partially sectional viewillustrating stages in an embodiment of the method of the invention.

DETAILED DESCRIPTION

The invention will now be described in further detail by reference tothe drawings, which illustrate an embodiment of the invention. Thedrawings are diagrammatic, showing features of the invention and theirrelation to other features and structures, and are not made to scale.For improved clarity of presentation, in the FIGs. illustrating stagesin the method of the invention, elements corresponding to elements shownin other drawings are not all particularly renumbered, although they areall readily identifiable in all the FIGs.

Turning now to FIG. 1, there is shown generally at 20 a reservoir formedin a support 22 and generally at 10 an integrated circuit chip beingheld by a conventional tool 12. The reservoir 28 is defined by areservoir bottom 24 and sides 26. The reservoir depth is indicated at27, and the reservoir is here shown filled nearly to its full depth withencapsulation resin forming a resin pool 30. The integrated circuit chip10 includes a semiconductor die 18 having interconnect bumps 16 attachedto interconnect sites (not shown in the FIGs.) in a chip surface 17. Thebump standoff height is indicated at 15. The chip surface 17 and theinterconnect bumps 16 together with other features not shown in theFIGs. constitute an interconnect side 14 of the chip. In FIG. 1, thetool 12 is poised to move toward the reservoir 20 (as shown by the arrow11 in FIG. 2) to dip the interconnect side 14 of the chip into the resinpool 30.

FIG. 2 shows the chip 10 being dipped into the resin pool 30. The bumps16 have been brought into contact with the reservoir bottom 28, so thatthe pool depth defines the depth to which the interconnect side of thechip is dipped into the pool. In FIGS. 1 and 2 the pool depth is shownas being slightly less than the reservoir depth 27, and pool depth isalso shown as being somewhat less than the bump standoff height 15. As aconsequence, in the example shown here, the surface 32 of the resin pooldoes not come into contact with the chip surface 17 and, accordingly,resin would be expected to remain on only the bumps when the chip iswithdrawn from the pool.

FIG. 3 shows a chip 10 that has been withdrawn from a resin pool.Evidently, the interconnect side of the chip shown in FIG. 3 was dippedto a greater depth in a resin pool than is shown in FIG. 2, inasmuch asin FIG. 3 the resin mass 34 is shown as being carried not only on thebumps 16 but also on the surface 17 of the semiconductor die. As will beappreciated, the quantity of resin in a resin mass carried by the chipafter the chip is withdrawn from the resin pool will depend not onlyupon the extent of contact to the chip with the resin in the pool, butalso upon surface characteristics (for example, wettability by theresin) of the various features on the chip and upon characteristics (forexample, viscosity) of the resin itself. A desired predetermined depthto which a particular chip should be dipped in a particular resincomposition, to result in a particular desired encapsulation form, canreadily be determined without undue experimentation. FIG. 3 also shows apackage substrate 40 having metal interconnect pads 42 in an arrangementcomplementary to the arrangement of the bumps on the chip, and the tool12 is holding the chip in apposition to the substrate with thecorresponding bumps and pads aligned. The tool is poised in FIG. 3 tobring the chip and substrate together as shown for example in FIG. 4.

In FIG. 4 the resin mass 36 is shown having been compressed between thechip in the substrate, and displaced by the various features on theinterconnect sides of the chip and of the substrate; to form a desired“fillet” 37, at the margins of the gap between the die and substrate,without excessive bleed out. The tool 12 is then released from the die,and encapsulating resin is cured to form a completed encapsulation 38 ofthe package 50 as shown in FIG. 5. Some deformation of the bumps duringthe attachment operation can be expected, resulting in a reduction ofthe standoff height. This can further compress the resin and force itinto asperities formed by the circuit pattern on the substrate surfaceas well as by features on the interconnect side of the chip, resultingin improved encapsulation integrity.

Other embodiments are within the following claims.

1-4. (canceled)
 5. A semiconductor device manufacturing tool forapplying encapsulating resin to an area of the semiconductor device,comprising: a semiconductor device support tool; a semiconductor devicehaving a plurality of interconnect bumps formed on a first surface ofthe semiconductor device, the interconnect bumps having a standoffheight as measured from a distal end of the interconnect bumps to thefirst surface, the semiconductor device further having a second surfaceopposite the first surface, the second surface of the semiconductordevice being attached to the semiconductor device support tool; asupport structure having a recessed area defining a reservoir whichcontains the encapsulating resin, the reservoir having a depth notgreater than the standoff height of the interconnect bumps, wherein theinterconnect bumps of the semiconductor device are dipped into thereservoir so the distal ends of the interconnect bumps contact a bottomof the reservoir and the encapsulating resin is deposited on theinterconnect bumps and first surface of the semiconductor device; and asubstrate having interconnect pads on a surface, the semiconductordevice support tool positioning the semiconductor device so that theinterconnect bumps on the semiconductor device contact the interconnectpads of the substrate, wherein the encapsulating resin deposited on thefirst surface of the semiconductor device is transferred to the surfaceof the substrate in proper quantity to encapsulate an area between thesemiconductor device and substrate without excessive bleed out of theencapsulating resin.
 6. The semiconductor device manufacturing tool ofclaim 5, wherein the depth of the reservoir is less than the standoffheight of the interconnect bumps.
 7. The semiconductor devicemanufacturing tool of claim 5, wherein the semiconductor device is aflip chip semiconductor device.
 8. The semiconductor devicemanufacturing tool of claim 5, wherein the semiconductor device andsubstrate are aligned prior to contacting the interconnect bumps to theinterconnect pads.
 9. The semiconductor device manufacturing tool ofclaim 5, wherein a quantity of encapsulating resin deposited on thefirst surface of the semiconductor device by dipping the interconnectbumps into the reservoir is determined by a depth of encapsulating resinin the reservoir.
 10. The semiconductor device manufacturing tool ofclaim 5, wherein the encapsulating resin forms a fillet around aperimeter of the semiconductor device.
 11. An apparatus for applyingencapsulating resin to an area of the semiconductor device, comprising:a semiconductor device having a plurality of interconnect bumps formedon a first surface of the semiconductor device, the interconnect bumpshaving a standoff height as measured from a distal end of theinterconnect bump to the first surface; a support structure having arecessed area defining a reservoir which contains the encapsulatingresin, the reservoir having a depth not greater than the standoff heightof the interconnect bumps, wherein the interconnect bumps of thesemiconductor device are dipped into the reservoir so the distal ends ofthe interconnect bumps contact a bottom of the reservoir and theencapsulating resin is deposited on the interconnect bumps and firstsurface of the semiconductor device; and a substrate having interconnectpads on a surface, the interconnect bumps of the semiconductor devicecontacting the interconnect pads of the substrate so that theencapsulating resin deposited on the first surface of the semiconductordevice is transferred to the surface of the substrate in proper quantityto encapsulate an area between the semiconductor device and substratewithout excessive bleed out of the encapsulating resin.
 12. Theapparatus of claim 11, wherein the depth of the reservoir is less thanthe standoff height of the interconnect bumps.
 13. The apparatus ofclaim 11, wherein the semiconductor device is a flip chip semiconductordevice.
 14. The apparatus of claim 11, wherein the semiconductor deviceand substrate are aligned prior to contacting the interconnect bumps tothe interconnect pads.
 15. The apparatus of claim 11, wherein a quantityof encapsulating resin deposited on the first surface of thesemiconductor device by dipping the interconnect bumps into thereservoir is determined by a depth of the encapsulating resin in thereservoir.
 16. The apparatus of claim 11, wherein the encapsulatingresin forms a fillet around a perimeter of the semiconductor device. 17.An apparatus for applying encapsulating resin to an area of thesemiconductor device, comprising: a semiconductor device having aplurality of interconnect bumps formed on a first surface of thesemiconductor device, the interconnect bumps having a standoff height asmeasured from a distal end of the interconnect bumps to the firstsurface; a support structure having a recessed area defining a reservoirwhich contains the encapsulating resin, the reservoir having a depth notgreater than the standoff height of the interconnect bumps, wherein theinterconnect bumps of the semiconductor device are dipped into thereservoir so the distal ends of the interconnect bumps contact a bottomof the reservoir and the encapsulating resin is deposited on theinterconnect bumps; and a substrate having interconnect pads on asurface, the interconnect bumps of the semiconductor device contactingthe interconnect pads of the substrate so that the encapsulating resindeposited on the interconnect bumps of the semiconductor device istransferred to the surface of the substrate to encapsulate an areabetween the semiconductor device and substrate.
 18. The apparatus ofclaim 17, wherein the depth of the reservoir is less than the standoffheight of the interconnect bumps.
 19. The apparatus of claim 17, whereinthe semiconductor device is a flip chip semiconductor device.
 20. Theapparatus of claim 17, wherein the semiconductor device and substrateare aligned prior to contacting the interconnect bumps to theinterconnect pads.
 21. The apparatus of claim 17, wherein a quantity ofencapsulating resin deposited on the first surface of the semiconductordevice by dipping the interconnect bumps into the reservoir isdetermined by a depth of encapsulating resin in the reservoir.
 22. Theapparatus of claim 17, wherein the encapsulating resin forms a filletaround a perimeter of the semiconductor device.